This invention relates to logic systems incorporating programmable circuits.
Programmable Logic Devices (PLD) are well known and are widely used to perform a variety of logic functions which may be controlled by logic input signals to the device. Examples of PLDs include Programmable Logic Arrays (PLA), Programmable Gate Arrays (PGA), and Programmable Memory Arrays (PMA). A PLA is based on a combinatorial logic network implementing either a sum of products or a product of sums decomposition of logic functions. In either instance, a relatively large number of inputs are shared uniformly by the products (sums) making up a logical sum (product). PLAs may be factory or field programmable. One version of a PGA (so-called fine grain) is based on one or more combinatorial logic networks implementing any function of a small number (often less than 5) of logic inputs. Another PGA version (so-called coarse grain) can generate a limited number of (but not all) functions of a greater number of logic inputs. The functions generated usually have a limited number of product terms that can be summed. Both types of PGA use one or more memory cells for temporarily storing results. PGAs may be field or factory programmable. A PMA is based on building blocks requiring 2.sup.n bits of memory for n logic inputs for implementing any logical function of the n inputs.
A disadvantage of these classes of PLDs is that a significant proportion of the applications require functions such as counting, addition, Boolean polynomials, etc. to be carried out. These functions require enough PLD resources to severely limit the amount of PLD resources available for controlling these operations.